SLX Mapper receives as input a parallel application specification in form of a process network or data-flow application. This formalism is a natural way to represent streaming and compute-intensive applications in a multitude of industries. With process networks, the application is represented as a collection of processes that communicate over logical buffered FIFO channels.

SLX Mapper analyzes the computation and communication patterns of the process network and uses advanced optimization techniques and performance estimations to automatically select (i) the optimal mapping of processes to heterogeneous cores and accelerators, (ii) the fastest mapping of logical channels to platform interconnect and memories, and (iii) the most effective memory allocation for the buffers used for inter-process communication.

Additionally, the user can specify real-time and resource constraints which are taken into account when computing a solution. Internally, SLX Mapper uses an abstract model of the target multicore architecture as well as fast and accurate software performance estimation technologies. Optionally, measured or estimated power consumption can be used together with performance to drive the mapping optimization. As a final output, SLX Mapper produces a complete spatial (“where”) and temporal (“when”) application mapping that can be forwarded to the SLX Generator, or to the customer’s in-house code generator backend. The SLX Mapper supports a wide range of existing platforms out-of-the-box.